Amigas come with different sockets, different configurations, which means, if you write your own ROMs you will need to understand the layouts and features of your type of ROM, here’s a list of standard, unmodified motherboard configurations and what you need for each, have a look at Features -> Saving ROMs for more info about creating files suitable for burning to EPROMs.
Single ROM, 16bit (A1000, A500, CDTV, A600, A2000)
A1000, 256k WOM (Write Once Memory) kickstarts only loaded from floppy
A500, 256k kickstarts (40 pin sockets), motherboard v3, v5 (needs “oops” patching to support 512k ROMs), if using EPROMs on Rev3/5 boards you may also want to consider adding additional “pull-up” resistors for stability, you can buy adapter boards that have both the “opps” fix and the pull-up resistors.
A500, 1Mb kickstarts, motherboard v6, v7 (need to verify this, not much info about v7)
A500+, 2Mb kickstarts (42 pin sockets), v8 motherboards
CDTV, 512k kickstarts
The First CDTV (40 pin socket) came with a 256k kickstart 1.3 ROM, however later versions are kickstart 2.0 compatible and therefore will take a 512k ROM. The CDTV also has a pair of sockets for a 256k extended ROM, these load at address 0xF00000.
I have seen a CDTV “ROM Tower” which appears to have the same address crossover as early A500 motherboards, so it’s possible that early (dev?) CDTV boards might have the same “oops” bug as Rev3/5 boards and aren’t capable of 512k.
The CDTV-CR appears to be similar is many respects to the A600 and therefore may be capable of using 1Mb/2Mb kickstarts.
A600, 2Mb kickstarts
The A600 has a 42 pin socket capable of 2Mb kickstarts
A2000, 512k kickstarts (40 pin socket)
1Mb ROMs are possible with a simple motherboard jumper (pin 47 from the CPU to pin 1 of an EPROM), in fact you can jumper pin 48 of the CPU to pin 42 of the EPROM for 2Mb ROMs
Dual ROM, 32bit (A1200, A3000, A4000)
A1200, 2Mb kickstarts
The A1200 has a pair of 42 pin sockets, each can contain a 1Mb (27c800, EPROM) ROM
A3000, 512k kickstarts
The A3000 ROM has two sets of sockets;
Front U180/U181 LO/HI 27C200 (messed up on all pre 8.0 boards?)
Back U182/U183 HI/LO 27C220/27C2048 Tower makes them 27C200 compatible
The rear sockets always work, either burn 27C220/27C2048 (or other pin compatible) chips to use in them directly, or add a ROM tower to convert for 27C200 compatibility.
The later boards fixed the front sockets (definitely late 8, but possibly one of the fixes in 8.0), and you can use 27C200 directly in them 27C200 is the 256k EPROM, you can use 27C400 (512k) which are easier to find, but the A3000 only sees the first 256k of each of them so can only use 512k Kickstart images without modification/ROMY/soft load etc.
(apparently) Many official A3000 chips are labelled incorrectly and the LO/HI is reversed, so U180, while being LO takes the chip marked HI.
A4000, 512k kickstarts (40 pin sockets)
Unfortunately, there’s no simple patch or hack to use 1Mb+ ROMs on an A4000, this is due to how the address lines are laid out and go via Fat Gary, if you want a larger kickstart than the default 512k then you can use additional hardware (such a the ROMY).
Single ROM, 32bit (CD32)
CD32, 1Mb kickstarts
The CD32 was originally designed to use two 16bit 42 pin sockets like an A1200, however (I assume for budgetary reasons) it was rewired to use a single socket and read alternative 16bit banks from the single ROM, there’s a sticker over the unpopulated socket.
Because of this curious setup writing the EPROMs is more complex, and for a 2Mb ROM (which is only possible with hardware mods) I’m not sure where the 0xA00000 ROM would be written/addressed – I’ll be looking at this as a single 2Mb ROM is possible with a small hardware change (moving two resistors).
If you have a single ROM consisting of two 512k ROM banks;
0xF80000 ROM 0
0xE00000 ROM 1
The output ROM will be written to four 256k offset banks with data interleaved.
Bank 0 (0-256k) ROM 1 Even words
Bank 1 (256k-512k) ROM 0 Even words
Bank 2 (512k-768k) ROM 1 Odd words
Bank 3 (768k-1Mb) ROM 0 Odd words
For i = 0 to 262142 step 2
output[i] = ROM1[(i*2)]
output[i+1] = ROM1[(i*2)+1]
output[262144+i] = ROM0[(i*2)]
output[262144+i+1] = ROM0[(i*2)+1]
output[524288+i] = ROM1[(i*2)+2]
output[524288+i+1] = ROM1[(i*2)+3]
output[786432+i] = ROM0[(i*2)+2]
output[786432+i+1] = ROM0[(i*2)+3]
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